Members and Tasks
Engineering Team
Woojoong Kim (Pure Storage)
Lead release and engineering tasks
Maintain CI/CD including Aether OnRamp integration
Documentation
Design/Implement/Maintain SD-RAN components
Design/Implement Scalable RAN Simulator
Hyunmin Yoo (Grad. school student, Kyunghee University, Korea)
Release process
Design/Implement Scalable RAN Simulator
Aether OnRamp integration
Research SD-RAN/Aether
Geon Kim (Grad. school student, Kyunghee University, Korea)
Release process
Design/Implement Scalable RAN Simulator
Aether OnRamp integration
Research SD-RAN/Aether
Sungjin Lee (Grad. school student, Kyunghee University, Korea)
Release process
Design/Implement Scalable RAN Simulator
Aether OnRamp integration
Research SD-RAN/Aether
Hoseong Choi (Grad. school student, Kyunghee University, Korea)
Release process
Design/Implement Scalable RAN Simulator
Aether OnRamp integration
Research SD-RAN/Aether
Hyuksun Kwon (Grad. school student, Kyunghee University, Korea)
Release process
Design/Implement Scalable RAN Simulator
Aether OnRamp integration
Research SD-RAN/Aether
Sangyeon Lee (Grad. school student, Kyunghee University, Korea)
Release process
Design/Implement Scalable RAN Simulator
Aether OnRamp integration
Research SD-RAN/Aether
Major Contributors (SD-RAN WG?)
Larry Peterson (Princeton / Aether TST)
Woojoong Kim (Intel Corporation / Aether TST)
Sarat Puthenpura (ONF)
Alex Stancu (O-RAN Software Community)
Gabriel Arrobo (Intel Labs / Aether TST)
Ashutosh Tiwari (Intel Labs)